The invention described herein was made by employees of the United States Government and may be used by or for the Government for governmental purposes without payment of any royalties thereon or therefor.
The invention relates to the growth of semiconductor device crystal films, and more particularly, to a method for producing high quality films of silicon carbide (SiC), aluminum nitride (AlN), gallium nitride (GaN), and other materials or compounds on atomically flat crystalline surfaces. Specifically, the invention enables the growth of low defect heteroepitaxial single crystal films on atomically flat crystal surfaces. The semiconductor devices find application in high power, high frequency, high temperature and high radiation environments, as well as use in optoelectronic devices such as lasers and light-emitting diodes.
This invention relates to the controlled growth of crystal films for application to the fabrication of semiconductor devices. The invention is particularly applicable to the production of crystals (herein used to include crystal films) of silicon carbide, aluminum nitride, gallium nitride, diamond, and other materials. A primary aspect of the invention is related to silicon carbide (SiC) and the nitrides (e.g., AlN and GaN) of the Group III elements; however, the invention has much broader applications and can be used for other elemental crystals and compounds. For example, films of ternary and quaternary compounds (and higher order compounds) of the III-V elements (e.g., GaAlN) could be grown. Also, elemental single crystal films, such as silicon and diamond could also be grown.
The term xe2x80x9catomically-flatxe2x80x9d is known in the art and is generally referred to herein as meaning a surface that is totally without any atomic-scale or macro-scale steps over an area defined by selected boundaries that may be created by grooves in a manner to be further described herein with reference to FIG. 4. Many of the methodologies of the present invention are shared with that of U.S. Pat. No. 5,915,194, as well as U.S. Pat. No. 6,165,874, both of which are herein incorporated by reference.
Semiconductor devices, including MISFETs and other device structures all related to the present invention, are used in a wide variety of electronic applications. Semiconductor devices include diodes, transistors, integrated circuits, sensors, and opto-electronic devices, such as light-emitting diodes and diode lasers. Various semiconductor devices using silicon or compound semiconductors, such as gallium arsenide (GaAs) and gallium phosphide (GaP) are commonly used. In order to fabricate semiconductor devices, it is necessary to be able to grow high-quality, low-defect-density single-crystal films with controlled impurity incorporation while possessing good surface morphology. The substrate upon which the film is grown should also be a high-quality, low-defect-density single crystal. In recent years, there has been an increasing interest in research on wide-bandgap semiconductors for use in high temperature, high power, high frequency, and/or high radiation operating conditions under which silicon and conventional III-V semiconductors cannot adequately function. Particular research emphasis has been placed on SiC, and III-nitride alloys, including AlN, GaN, InGaN, AlGaN, and others.
Conventional semiconductors are unable to meet some of the increasing demands of the automobile and aerospace industries as they move to smarter and more electronic systems. New wide bandgap materials are being developed to meet the diverse demands for more power at higher operating temperatures. Two of the most promising emerging wide bandgap semiconductors are silicon carbide (SiC) and gallium nitride (GaN). At over three electron volts, the bandgap of these materials is nearly three times as large as that of silicon. This advantage theoretically translates into very large improvements in power handling capabilities and higher operating temperatures that will enable revolutionary product improvements. Once material-related technology obstacles are overcome, SiC""s properties are expected to dominate high power switching and harsh-environment electronics for manufacturing and engine control applications, while GaN will enable high power high frequency microwave systems at frequencies beyond 10 GHz. To date the best SiC devices to our knowledge are homojunction (i.e., wafer and device layers are all hexagonal SiC), while GaN devices are heterojunction (i.e., SiC or sapphire wafers with device layers of GaN, AlGaN, AlN, etc.) because production of bulk GaN wafers is not practical at the present time.
Silicon carbide crystals exist in hexagonal, rhombohedral and cubic crystal structures. Generally, the cubic structure, in particular, the zincblende structure is referred to as xcex2-SiC or 3C-SiC, whereas numerous polytypes of the hexagonal and rhombohedral structures are collectively referred to as xcex1-SiC. To our knowledge, only bulk (i.e., large) crystals of the a polytypes have been grown to date with reasonable quality and size acceptable for device applications. The xcex2 (or 3C) polytype can only be obtained as small (less than 1 cm2) blocky crystals or thick epitaxial films on small 3C substrates or crystal films of poor quality grown heteropitaxially on some other substrate. The most commonly available xcex1-SiC polytypes are 4H-SiC and 6H-SiC; these are commercially available as polished wafers, presently up to 75 mm in diameter. Each of the SiC polytypes has its own specific advantages over the others. For example, (1) 4H-SiC has a significantly higher electron mobility compared to 6H-SiC; (2) 6H-SiC is used as a substrate for the commercial fabrication of GaN blue light-emitting diodes (LED""s); and (3) 3C-SiC has a high electron mobility similar to that of 4H-SiC and may function over wider temperature ranges, compared to the xcex1 polytypes, but crystals of sufficient quality and size have not been readily obtainable.
Silicon carbide polytypes are formed by the stacking of double layers, also referred to as bilayers, of covalently bonded Si and C atoms. As will be more fully described later, each double layer may be situated in one of three atomic stacking positions known as A, B, and C. The sequence of stacking determines the particular polytype; for example, the repeat sequence for 3C-SiC is ABCABC . . . (or ACBACB . . . ) the repeat sequence for 4H-SiC is ABACABAC . . . and the repeat sequence for 6H is ABCACBABCACB . . . From this it can be seen that the number in the polytype designation gives the number of double layers in the repeat sequence and the letter denotes the structure type (cubic, hexagonal, or rhombohedral). The stacking direction is designated as the crystal c-axis and is in the crystal  less than 0001 greater than  direction; it is perpendicular to the basal plane which is the crystal (0001) plane. The SiC polytypes are polar in the  less than 0001 greater than  directions; in one direction, the crystal face is terminated with silicon (Si) atoms; in the other direction, the crystal face is terminated with carbon (C) atoms. These two faces of the (0001) plane are known as the silicon face (Si-face) and carbon face (C-face), respectively. As will be more fully described later with respect to FIG. 15(A), the 3C-SiC (i.e., cubic) polytype has four equivalent stacking directions, and thus there are four equivalent planes, the (111) planes, that are basal planes. As used herein, xe2x80x9cbasal planexe2x80x9d shall refer to either the (0001) plane for a xcex1-SiC, or the (111) plane of 3C-SiC. The term xe2x80x9cvicinal (0001) waferxe2x80x9d shall be used herein for wafers whose polished surface (the growth surface) is misoriented less than 10xc2x0 from the basal plane. The angle of misorientation shall be referred to herein as the tilt angle. The term xe2x80x9chomoepitaxialxe2x80x9d shall be referred to herein as epitaxial growth, whereby the film and the substrate (wafer) are of the same polytype and material, and the term xe2x80x9cheteroepitaxialxe2x80x9d shall be referred to herein as epitaxial growth whereby the film is of a different polytype or material than the substrate. The term xe2x80x9cmesaxe2x80x9d is meant to represent an isolated growth region to be further described herein. The term xe2x80x9cbilayerxe2x80x9d shall be referred to herein as a layer along the basal plane consisting of two-tightly bonded monolayers of atoms, such as Si and C atoms tightly bonded in bilayers of SiC to be further described. The term xe2x80x9cdefect freexe2x80x9d shall be referred to herein as a single crystal that is free of extended structural defects, such as dislocations and stacking faults that propagate over numerous atoms in at least one direction. The term xe2x80x9cdefect freexe2x80x9d is not meant to describe isolated point defects that involve at most 1 or 2 atoms at an isolated 3D point in the crystal, such as atomic vacancy point defects, interstitial point defects, and impurity point defects.
Theories explaining epitaxial single-crystal growth are well known. Crystal growth can take place by several mechanisms. Two of these are: (1) growth can take place by the lateral growth of existing atomic-scale steps on the surface of a substrate and (2) growth can take place by the formation of two-dimensional atomic-scale nuclei on the surface followed by lateral growth from the steps formed by the nuclei. The lateral growth from steps is sometimes referred to as xe2x80x9cstep-flow growth.xe2x80x9d In the first mechanism, growth proceeds by step-flow from existing steps without the formation of any two-dimensional nuclei (i.e., without 2D nucleation). In the nucleation mechanism, the nucleus must reach a critical size in order to be stable: in other words, a potential energy barrier must be overcome in order for a stable nucleus to be formed. Contamination or defects on the substrate surface can lower the required potential energy barrier at a nucleation site. In the processes described in U.S. Pat. No. 5,915,194, having certain drawbacks related to lattice mismatch giving rise to undesired crystal defects, crystal growth proceeds by (1) step flow without 2D nucleation or by (2) step-flow with 2D nucleation. Step-flow growth with 2D nucleation allows the growth of epitaxial films of any desired thickness. In the processes described in the present invention, optimum growth (i.e., defect free) occurs when a first bilayer and a second bilayer are completed from lateral step-flow expansion of single nucleation islands of heteroepitaxial film on an atomically flat surface.
As discussed above, as well as in U.S. Pat. No. 5,915,194, 3C-SiC, to our knowledge, is not available in high quality single-crystal large wafer form. Hence, 3C-SiC device structures must be grown heteroepitaxially on some other substrate material. The present invention overcomes the problems of prior art, including recently discovered deficiencies of U.S. Pat. No. 5,915,194 to be further described, to realize the growth of high quality low-defect 3C-SiC films on 6H-SiC and 4H-SiC substrates.
In addition to non-availability of high quality 3C-SiC single crystal wafers or epilayers, other wide-bandgap semiconductor compounds that are not available in single-crystal wafer form and which have great commercial potential are the nitrides of aluminum, gallium, and indium. Gallium nitride (GaN) in particular, has great potential as an optoelectronic material. Currently, commercial light-emitting diodes are being fabricated by growing GaN or InGaN films on 6H-SiC or sapphire substrates. Even though these films have extremely high defect densities (typically around 108 cmxe2x88x922), very bright and efficient LED""s can be fabricated. Pulsed blue lasers have been fabricated from III-N, as well as continuous blue lasers that operate for a period of time before failure related to crystal defects. The present invention provides a means for reducing defects in the GaN and InGaN films and hence makes a more durable continuous duty III-N laser possible.
Although U.S. Pat. No. 5,915,194, as well as U.S. Pat. No. 6,165,874, provides many benefits, it has certain limitations. In our practice of the teachings of U.S. Pat. No. 5,915,194, it has been determined that other defects, not related to surface steps, form when practicing heteroepitaxial growth on atomically flat surfaces as taught by U.S. Pat. No. 5,915,194. As pointed out in U.S. Pat. No. 5,915,194, heteroepitaxial growth on an atomically flat basal plane starts by the nucleation of a growth island that consists of a bilayer of tightly bonded Si and C atoms. In U.S. Pat. No. 5,915,194, as illustrated in FIGS. 7 and 8 thereof, it is described that multiple growth islands (Reference #46 in FIG. 7 thereof) nucleated on the flat surfaces would coalesce without defects because the atoms of the expanding islands would remain coherent with the substrate crystal lattice. However, recent experimental observations in growing heteroepitaxial 3C-SiC films on atomically flat 6H and 4H-SiC substrates indicate this is not the case. In reality, numerous stacking faults are experimentally observed when nucleation of multiple islands takes place within a given atomically flat mesa surface.
The present invention prevents the occurrence of these stacking faults while enabling the growth of low-defect heteroepitaxial single crystal films on atomically flat single crystal surfaces. The present invention overcomes deficiencies in prior art, including those of U.S. Pat. Nos. 5,915,194 and 5,363,800 (herein incorporated by reference), as well as those of U.S. Pat. No. 6,165,874, while initiating growth of heteroepitaxial single crystal films on device-size regions of atomically flat substrate surfaces.
It is a primary object of the present invention to provide a method of growing high quality low-defect crystal films of semiconductors on substrates that are different than the crystal film. The method is particularly suited for the growth of 3C-SiC, 2H-AlN, and 2H-GaN or InGaN on 6H/4H-SiC substrates.
It is another object of the present invention to provide a method of growing III-N heteroepitaxial films on atomically flat surfaces of 6H/4H-SiC substrates.
It is still a further object of the present invention to provide high quality heteroepitaxial growth of materials with relatively large lattice mismatch to the substrate, yielding heterojunctions.
It is still another object of the present invention to eliminate the need for buffer layers that are required by prior art to overcome lattice mismatch in single-crystal heteroepitaxial films.
Moreover, it is an object of the present invention to provide a method that produces devices that are comprised of reduced defect material having an extended operational life, reduced power consumption, and reduced size thereby decreasing production costs.
The practice of the present invention particularly related to atomically-flat crystalline surfaces and crystal films is partially based on our discovery of that by selecting a particular set of growth conditions intended to greatly reduce the rate of two-dimensional (2D) nucleation, we reproducibly achieve the growth of 3C-SiC heterofilms entirely free of stacking faults. We also discovered that after initial 3C-SiC nucleation was carried out on a step-free surface at a low nucleation rate, that we could then change the growth conditions to greatly increase the nucleation rate without any detriment to the quality of the heteroepitaxial film. These discoveries strongly indicate that optimum growth (i.e., defect-free) occurs when a first bilayer and a subsequent second layer is completed from the lateral step-flow expansion of single nucleation islands (one island for each bilayer) of the heteroepitaxial film on the atomically-flat surface.
In general, the invention is a method of producing low-defect crystal film structures of materials that are not presently available in the form of large area single-crystal substrates. This method is accomplished by utilizing particular heteroepitaxial growth processes on an atomically-flat basal plane surface of a substrate of different material and/or structure other than the desired crystal film.
The method is primarily concerned with depositing a heteroepitaxial single-crystal film on a plurality of step-free surfaces of a basal plane surface orientation of a selected single-crystal substrate material serving as a wafer. The method comprises the steps of:
(a) preparing more than one step-free planar surface on the selected substrate, wherein each of the plurality of step-free surfaces has a boundary of selected size and shape;
(b) selecting a heteroepitaxial film material whose chemical bonding structure is tetrahedral and exhibits a property that under predetermined growth conditions that growth of the heteroepitaxial film material grows in bilayers on the selected step-free planar surface;
(c) carrying out a selected deposition process under selected growth conditions that produce (1) a single nucleus of the heteroepitaxial film material at least one bilayer thick on the step-free surface with the selected boundary, followed by (2) lateral expansion of the single nucleus over an entire surface defined by the selected boundary of the plurality of step-free basal plane surfaces before a second nucleus can form elsewhere on the selected step-free planar surface, and (3) a single nucleus of the second bilayer of heteroepitaxial film, followed by (4) lateral expansion of the single nucleus over the entire surface defined by the selected boundary before a second nucleus can form elsewhere on the first bilayer of heteroepitaxial film on the selected step-free planar surface, and
(d) providing growth of subsequent additional bilayers of the said heteroepitaxial film by providing a suitable set of growth conditions until a desired thickness of said heteroepitaxial film is achieved.
Further, the present invention relates to a method of growing high-quality low-defect single crystal films of silicon and diamond materials on substrates that are different than the film. As an example, the growth of 3C-SiC, 2H-AlN, and/or 2H-GaN on 6H-SiC substrates is related to the present invention.
A specific application of this invention is the growth of 3C-SiC on a 6H-SiC substrate. Another application is the growth of 2H-GaN on a 6H-SiC substrate. Other SiC polytypes, such as 4H-SiC could also be used as substrates in the practice of this invention.
In the practice of our invention, important considerations to achieve growth with little or no two-dimensional nucleation are the following: contamination and surface defects must be minimized because the contamination""s can reduce the energy barrier that hinders two-dimensional nucleation. Also line defects (dislocations) that intersect the growth surface must be minimized because some dislocations act as localized step sources that can dominate growth on the substrate mesas preventing the achievement of atomically-flat or nearly atomically-flat mesas necessary for the practice of the present invention.
A further consideration related to the invention is that multiple rotational orientations of the polytypic stacking sequence can occur on surfaces with steps when a 3C sequence is grown on a higher order polytypic substrate, such as a 4H or a 6H polytypic sequence. When crystal film islands, that have different rotational orientations, coalesce, then defects such as double positioning boundaries (DPB""s) form at a boundary between the two domains. It is expected that this same behavior holds for the 2H sequence grown on the 4H or 6H sequence.